Staff Firmware/Software Engineer- Embedded SoC/Microcontroller/DSP/SERDES/PCIE/PHY

About Marvell

Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

What You Can Expect

The core responsibilities of the SW team include embedded FW running on our RISC-V-based multi-core MCU, a C SDK provided to customers, a Python-based GUI for in-field debugging, and test infrastructure for the above.

The SW team is a key enabler for bringing a product to production, and the role of a Staff Engineer in our team is to ensure the overall success of that product. This role combines technical leadership with project coordination responsibilities.

Technical Leadership & Development

• Architecture, Design, Development, and Testing of embedded C firmware for controlling our extremely complicated DSP HW
• Drive firmware development for DSP control blocks, including RX/TX signal processing, FEC, PLL/FLL, reference generation, and thermal monitoring
• Technical reviews of firmware architecture, API design, and system integration approaches
• Translate complex specifications from standards bodies (MSA/OIF/CMIS) or directly from customers into easy-to-digest requirements, and clear sequence diagrams to aid in development
• Debug issues, drive to root causes with HW/Systems teams, and follow up with test/validation/customer support teams

Project Coordination & Cross-Functional Collaboration

• Work with the cross-functional team to plan SW milestones, develop in sprints, close tickets, and roll out features for the product
• Coordinate with Marketing, AE, Test, Validation, SW_QA, and Hardware teams to align on deliverables and schedules
• Provide regular status updates on milestones, scope, dependencies, and blockers
• Manage Agile sprint planning and backlog prioritization in collaboration with stakeholders

Customer Engagement & Support

• Technical discussions with tier-1 customers on feature requirements, API specifications, and implementation
• Support customer bring-up activities and resolve field issues
• Work with AE teams to understand customer expectations and deliver critical features
• Handle customer-specific feature development such as FEC burst statistics, VDM telemetry, and CMIS compliance

What We're Looking For

• Minimum Requirements:

• Experience in memory-constrained embedded C/C++ FW development
• Architecture design & development, code reviews & testing, through to customer volume production
• Understanding of embedded SoC, microcontroller architecture (RISC-V a plus), memory-mapped hardware interfaces, GPIOs, ISRs, etc.
• Excellent verbal and written communication skills in English, and able to collaborate in a large cross-functional organization

• Preferred but not required:

• Experience with SERDES, IM-DD/Coherent DSP, Ethernet/PCIe PHYs, and/or Optical Module SW
• Experience with designing/developing/debugging software state machines, transitions, context saving, and error handling
• Experience with mixed-signal (analog+digital) control and monitoring, PID/feedback loop control
• Experience with bare-metal, RTOS, device drivers, Linux kernel, etc.
• Familiarity with advanced compiler options and details (clang/gcc preferred)
• Proficient in C and Python, with knowledge of git, Linux, makefiles, gdb, IDEs, bash
• Familiarity with digital verification test flows, FPGA emulation, and hardware languages such as Verilog
• Familiarity with lab equipment such as oscilloscopes, supplies, PNAs, ONTs
• Understanding of Ethernet networking from the OSI model, with emphasis on the PHY up to the data link level
• Familiarity with forward error correction, PCS framing, PMA/PMD, PRBS, and other PHY traffic schemes
• Understanding of signal processing: histograms, BER, SNR, sampling phase, Shannon limit, impulse & frequency response, FFT, etc.

• Education

• BS/MS.PhD degree in Computer Science, Electrical/Software Engineering, or related technical field(s)

Expected Base Pay Range (USD)

The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.

Interview Integrity

To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.

These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.